|
mcurrentsens 2.2.0
|
Settings for registers of mCurrent Sens Click driver. More...
Settings for registers of mCurrent Sens Click driver.
| #define MCURRENTSENS_ADC_FS_CODE 8388608.0f |
| #define MCURRENTSENS_CH1_CURRENT_COEFF ( MCURRENTSENS_CH1_GAIN_OPAMP * MCURRENTSENS_CH1_R5_RSHUNT ) |
| #define MCURRENTSENS_CH1_GAIN 1.0f |
| #define MCURRENTSENS_CH1_GAIN_OPAMP 50.0f |
mCurrent Sens board coefficient setting.
Specified board coefficient setting of mCurrent Sens Click driver.
| #define MCURRENTSENS_CH1_R16_TOP 1000.0f |
| #define MCURRENTSENS_CH1_R21_BOTTOM 38.3f |
| #define MCURRENTSENS_CH1_R5_RSHUNT 0.05f |
| #define MCURRENTSENS_CH1_VOLTAGE_COEFF |
| #define MCURRENTSENS_CH2_CURRENT_COEFF ( MCURRENTSENS_CH2_GAIN_OPAMP * MCURRENTSENS_CH2_R8_RSHUNT ) |
| #define MCURRENTSENS_CH2_GAIN 0.5f |
| #define MCURRENTSENS_CH2_GAIN_OPAMP 50.0f |
| #define MCURRENTSENS_CH2_R15_TOP 1000.0f |
| #define MCURRENTSENS_CH2_R17_BOTTOM 38.3f |
| #define MCURRENTSENS_CH2_R8_RSHUNT 0.05f |
| #define MCURRENTSENS_CH2_VOLTAGE_COEFF |
| #define MCURRENTSENS_CONFIG0_ADC_MODE_CONVERSION 0x03 |
| #define MCURRENTSENS_CONFIG0_ADC_MODE_MASK 0x03 |
| #define MCURRENTSENS_CONFIG0_ADC_MODE_SHUTDOWN 0x00 |
| #define MCURRENTSENS_CONFIG0_ADC_MODE_STANDBY 0x02 |
| #define MCURRENTSENS_CONFIG0_CLK_SEL_EXT 0x00 |
| #define MCURRENTSENS_CONFIG0_CLK_SEL_INT_NO_OUT 0x20 |
| #define MCURRENTSENS_CONFIG0_CLK_SEL_INT_OUT 0x30 |
| #define MCURRENTSENS_CONFIG0_CLK_SEL_MASK 0x30 |
| #define MCURRENTSENS_CONFIG0_CS_SEL_0P9UA 0x04 |
| #define MCURRENTSENS_CONFIG0_CS_SEL_15UA 0x0C |
| #define MCURRENTSENS_CONFIG0_CS_SEL_3P7UA 0x08 |
| #define MCURRENTSENS_CONFIG0_CS_SEL_MASK 0x0C |
| #define MCURRENTSENS_CONFIG0_CS_SEL_NONE 0x00 |
| #define MCURRENTSENS_CONFIG0_PARTIAL_SHUTDOWN_DIS 0x40 |
| #define MCURRENTSENS_CONFIG0_PARTIAL_SHUTDOWN_EN 0x00 |
| #define MCURRENTSENS_CONFIG0_PARTIAL_SHUTDOWN_MASK 0x40 |
| #define MCURRENTSENS_CONFIG0_VREF_SEL_EXT 0x00 |
mCurrent Sens CONFIG0 register setting.
Specified setting for CONFIG0 register of mCurrent Sens Click driver.
| #define MCURRENTSENS_CONFIG0_VREF_SEL_INT 0x80 |
| #define MCURRENTSENS_CONFIG0_VREF_SEL_MASK 0x80 |
| #define MCURRENTSENS_CONFIG1_OSR_1024 0x14 |
| #define MCURRENTSENS_CONFIG1_OSR_128 0x08 |
| #define MCURRENTSENS_CONFIG1_OSR_16384 0x24 |
| #define MCURRENTSENS_CONFIG1_OSR_2048 0x18 |
| #define MCURRENTSENS_CONFIG1_OSR_20480 0x28 |
| #define MCURRENTSENS_CONFIG1_OSR_24576 0x2C |
| #define MCURRENTSENS_CONFIG1_OSR_256 0x0C |
| #define MCURRENTSENS_CONFIG1_OSR_32 0x00 |
| #define MCURRENTSENS_CONFIG1_OSR_4096 0x1C |
| #define MCURRENTSENS_CONFIG1_OSR_40960 0x30 |
| #define MCURRENTSENS_CONFIG1_OSR_49152 0x34 |
| #define MCURRENTSENS_CONFIG1_OSR_512 0x10 |
| #define MCURRENTSENS_CONFIG1_OSR_64 0x04 |
| #define MCURRENTSENS_CONFIG1_OSR_8192 0x20 |
| #define MCURRENTSENS_CONFIG1_OSR_81920 0x38 |
| #define MCURRENTSENS_CONFIG1_OSR_98304 0x3C |
| #define MCURRENTSENS_CONFIG1_OSR_MASK 0x3C |
| #define MCURRENTSENS_CONFIG1_PRE_DIV_1 0x00 |
mCurrent Sens CONFIG1 register setting.
Specified setting for CONFIG1 register of mCurrent Sens Click driver.
| #define MCURRENTSENS_CONFIG1_PRE_DIV_2 0x40 |
| #define MCURRENTSENS_CONFIG1_PRE_DIV_4 0x80 |
| #define MCURRENTSENS_CONFIG1_PRE_DIV_8 0xC0 |
| #define MCURRENTSENS_CONFIG1_PRE_DIV_MASK 0xC0 |
| #define MCURRENTSENS_CONFIG2_AZ_MUX_DIS 0x00 |
| #define MCURRENTSENS_CONFIG2_AZ_MUX_EN 0x04 |
| #define MCURRENTSENS_CONFIG2_AZ_MUX_MASK 0x04 |
| #define MCURRENTSENS_CONFIG2_AZ_REF_DIS 0x00 |
| #define MCURRENTSENS_CONFIG2_AZ_REF_EN 0x02 |
| #define MCURRENTSENS_CONFIG2_AZ_REF_MASK 0x02 |
| #define MCURRENTSENS_CONFIG2_BOOST_MASK 0xC0 |
| #define MCURRENTSENS_CONFIG2_BOOST_X0P5 0x00 |
mCurrent Sens CONFIG2 register setting.
Specified setting for CONFIG2 register of mCurrent Sens Click driver.
| #define MCURRENTSENS_CONFIG2_BOOST_X0P66 0x40 |
| #define MCURRENTSENS_CONFIG2_BOOST_X1 0x80 |
| #define MCURRENTSENS_CONFIG2_BOOST_X2 0xC0 |
| #define MCURRENTSENS_CONFIG2_GAIN_MASK 0x38 |
| #define MCURRENTSENS_CONFIG2_GAIN_X0P33 0x00 |
| #define MCURRENTSENS_CONFIG2_GAIN_X1 0x08 |
| #define MCURRENTSENS_CONFIG2_GAIN_X16 0x28 |
| #define MCURRENTSENS_CONFIG2_GAIN_X2 0x10 |
| #define MCURRENTSENS_CONFIG2_GAIN_X32 0x30 |
| #define MCURRENTSENS_CONFIG2_GAIN_X4 0x18 |
| #define MCURRENTSENS_CONFIG2_GAIN_X64 0x38 |
| #define MCURRENTSENS_CONFIG2_GAIN_X8 0x20 |
| #define MCURRENTSENS_CONFIG2_RESERVED 0x01 |
| #define MCURRENTSENS_CONFIG3_CONV_MODE_CONTINUOUS 0xC0 |
| #define MCURRENTSENS_CONFIG3_CONV_MODE_MASK 0xC0 |
| #define MCURRENTSENS_CONFIG3_CONV_MODE_ONE_SHOT_SHUT 0x00 |
mCurrent Sens CONFIG3 register setting.
Specified setting for CONFIG3 register of mCurrent Sens Click driver.
| #define MCURRENTSENS_CONFIG3_CONV_MODE_ONE_SHOT_STBY 0x80 |
| #define MCURRENTSENS_CONFIG3_CRC_FORMAT_16BIT 0x00 |
| #define MCURRENTSENS_CONFIG3_CRC_FORMAT_32BIT 0x08 |
| #define MCURRENTSENS_CONFIG3_CRC_FORMAT_MASK 0x08 |
| #define MCURRENTSENS_CONFIG3_DATA_FORMAT_24BIT 0x00 |
| #define MCURRENTSENS_CONFIG3_DATA_FORMAT_32BIT_CHID 0x30 |
| #define MCURRENTSENS_CONFIG3_DATA_FORMAT_32BIT_LEFT 0x10 |
| #define MCURRENTSENS_CONFIG3_DATA_FORMAT_32BIT_RIGHT 0x20 |
| #define MCURRENTSENS_CONFIG3_DATA_FORMAT_MASK 0x30 |
| #define MCURRENTSENS_CONFIG3_EN_CRCCOM_DIS 0x00 |
| #define MCURRENTSENS_CONFIG3_EN_CRCCOM_EN 0x04 |
| #define MCURRENTSENS_CONFIG3_EN_CRCCOM_MASK 0x04 |
| #define MCURRENTSENS_CONFIG3_EN_GAINCAL_DIS 0x00 |
| #define MCURRENTSENS_CONFIG3_EN_GAINCAL_EN 0x01 |
| #define MCURRENTSENS_CONFIG3_EN_GAINCAL_MASK 0x01 |
| #define MCURRENTSENS_CONFIG3_EN_OFFCAL_DIS 0x00 |
| #define MCURRENTSENS_CONFIG3_EN_OFFCAL_EN 0x02 |
| #define MCURRENTSENS_CONFIG3_EN_OFFCAL_MASK 0x02 |
| #define MCURRENTSENS_CURRENT_TARGET_0_MA 0.0f |
| #define MCURRENTSENS_CURRENT_TARGET_10_MA 10.0f |
| #define MCURRENTSENS_DATA_READY_TIMEOUT_MS 200 |
| #define MCURRENTSENS_DEVICE_ADDRESS 0x57 |
mCurrent Sens device address setting.
Specified setting for device slave address selection of mCurrent Sens Click driver.
| #define MCURRENTSENS_DEVICE_ADDRESS_WP 0x37 |
| #define MCURRENTSENS_EEPROM_ADDR_END 0xFF |
| #define MCURRENTSENS_EEPROM_ADDR_START 0x00 |
mCurrent Sens memory size setting.
Specified setting for memory size of mCurrent Sens Click driver.
| #define MCURRENTSENS_EEPROM_PAGE_SIZE 16 |
| #define MCURRENTSENS_GAIN_ADC 1.0f |
| #define MCURRENTSENS_GAINCAL_DEFAULT 0x800000ul |
| #define MCURRENTSENS_IRQ_CRCCFG_STATUS 0x20 |
| #define MCURRENTSENS_IRQ_DR_STATUS 0x40 |
mCurrent Sens IRQ register setting.
Specified setting for IRQ register of mCurrent Sens Click driver.
| #define MCURRENTSENS_IRQ_EN_FASTCMD_DIS 0x00 |
| #define MCURRENTSENS_IRQ_EN_FASTCMD_EN 0x02 |
| #define MCURRENTSENS_IRQ_EN_FASTCMD_MASK 0x02 |
| #define MCURRENTSENS_IRQ_EN_STP_DIS 0x00 |
| #define MCURRENTSENS_IRQ_EN_STP_EN 0x01 |
| #define MCURRENTSENS_IRQ_EN_STP_MASK 0x01 |
| #define MCURRENTSENS_IRQ_MODE_IRQ_HIGH_Z 0x00 |
| #define MCURRENTSENS_IRQ_MODE_IRQ_LOGIC_HIGH 0x04 |
| #define MCURRENTSENS_IRQ_MODE_MASK 0x0C |
| #define MCURRENTSENS_IRQ_MODE_MDAT_HIGH_Z 0x08 |
| #define MCURRENTSENS_IRQ_MODE_MDAT_LOGIC_HIGH 0x0C |
| #define MCURRENTSENS_IRQ_POR_STATUS 0x10 |
| #define MCURRENTSENS_LOCK_LOCK 0x00 |
| #define MCURRENTSENS_LOCK_UNLOCK 0xA5 |
mCurrent Sens LOCK register setting.
Specified setting for LOCK register of mCurrent Sens Click driver.
| #define MCURRENTSENS_MUX_AGND 0x08 |
| #define MCURRENTSENS_MUX_AVDD 0x09 |
| #define MCURRENTSENS_MUX_CH0 0x00 |
| #define MCURRENTSENS_MUX_CH1 0x01 |
| #define MCURRENTSENS_MUX_CH1_CURRENT_N MCURRENTSENS_MUX_CH1 |
| #define MCURRENTSENS_MUX_CH1_CURRENT_P MCURRENTSENS_MUX_CH0 |
mCurrent Sens board channel mapping.
Specified board channel mapping of mCurrent Sens Click driver.
| #define MCURRENTSENS_MUX_CH1_VOLTAGE_N MCURRENTSENS_MUX_CH3 |
| #define MCURRENTSENS_MUX_CH1_VOLTAGE_P MCURRENTSENS_MUX_CH2 |
| #define MCURRENTSENS_MUX_CH2 0x02 |
| #define MCURRENTSENS_MUX_CH2_CURRENT_N MCURRENTSENS_MUX_CH7 |
| #define MCURRENTSENS_MUX_CH2_CURRENT_P MCURRENTSENS_MUX_CH6 |
| #define MCURRENTSENS_MUX_CH2_VOLTAGE_N MCURRENTSENS_MUX_CH5 |
| #define MCURRENTSENS_MUX_CH2_VOLTAGE_P MCURRENTSENS_MUX_CH4 |
| #define MCURRENTSENS_MUX_CH3 0x03 |
| #define MCURRENTSENS_MUX_CH4 0x04 |
| #define MCURRENTSENS_MUX_CH5 0x05 |
| #define MCURRENTSENS_MUX_CH6 0x06 |
| #define MCURRENTSENS_MUX_CH7 0x07 |
| #define MCURRENTSENS_MUX_REFIN_IN 0x0C |
| #define MCURRENTSENS_MUX_REFIN_OUT 0x0B |
| #define MCURRENTSENS_MUX_RESERVED 0x0A |
| #define MCURRENTSENS_MUX_TEMP_M 0x0E |
| #define MCURRENTSENS_MUX_TEMP_P 0x0D |
| #define MCURRENTSENS_MUX_VCM 0x0F |
| #define MCURRENTSENS_MUX_VIN_N_MASK 0x0F |
| #define MCURRENTSENS_MUX_VIN_N_SHIFT 0 |
| #define MCURRENTSENS_MUX_VIN_P_MASK 0xF0 |
| #define MCURRENTSENS_MUX_VIN_P_SHIFT 4 |
mCurrent Sens MUX register setting.
Specified setting for MUX register of mCurrent Sens Click driver.
| #define MCURRENTSENS_OFFSETCAL_DEFAULT 0x000000ul |
mCurrent Sens calibration register setting.
Specified calibration register setting of mCurrent Sens Click driver.
| #define MCURRENTSENS_RESERVED_16_DEFAULT 0x000F |
| #define MCURRENTSENS_RESERVED_24_DEFAULT 0x900000ul |
mCurrent Sens reserved register setting.
Specified reserved register setting of mCurrent Sens Click driver.
| #define MCURRENTSENS_RESERVED_8_DEFAULT 0x30 |
| #define MCURRENTSENS_SAMPLE_COUNT 50 |
| #define MCURRENTSENS_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
Data sample selection.
This macro sets data samples for SPI modules.
| #define MCURRENTSENS_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
| #define MCURRENTSENS_TEMPERATURE_COEFF 0.2973f |
| #define MCURRENTSENS_TEMPERATURE_OFFSET 80.0f |
| #define MCURRENTSENS_V_TO_MV 1000.0f |
| #define MCURRENTSENS_VOLTAGE_TARGET_0_MV 0.0f |
| #define MCURRENTSENS_VOLTAGE_TARGET_3000_MV 3000.0f |
| #define MCURRENTSENS_VREF_INTERNAL 2.4f |